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HV862 Dimmable, Low Noise, Dual EL Lamp Driver
Features
Adjustable output regulation for dimming Lamp fade-in/fade-out capability Low audible noise 180VPP output voltage for higher brightness 1.5V enable input logic high Single cell lithium ion compatible One miniature inductor to power both lamps Separately adjustable lamp and converter frequencies Split supply capability 16-Lead QFN package The device uses a single inductor and a minimum number of passive components. Using the internal reference voltage, the regulated output voltage is at a nominal value of 90V. The EL Lamps will therefore see 90V. The two EL Lamps can be turned ON and OFF using two CMOS logic inputs, EN1 and EN2. The driver is disabled when both EN1 and EN2 are at logic low. The HV862 has two internal oscillators, a switching MOSFET, and two high voltage EL Lamp driver H-bridges. Each driver has its own half bridge common output, COM1 and COM2, which significantly minimizes the DC offset seen by the EL Lamp. The frequency for the switching MOSFET is set by an external resistor connected between the RSW-osc pin and the supply pin VDD. The EL Lamp driver frequency is set by an external resistor connected between the REL-osc pin and the VDD pin. An external inductor is connected between the LX and VDD pins or VIN for split supply applications. Depending upon the EL Lamp sizes, a 1.0nF to 10.0nF capacitor is connected between the CS and ground.
Applications
Dual display cellular phones Keypad and LCD backlighting PDAs Handheld wireless communication products Global Positioning Systems (GPS)
As the switching MOSFET charges the external inductor and discharges it into the capacitor at CS, the voltage at General Description CS will start to increase. Once the voltage at CS reaches a The Supertex HV862 is a low noise, dimmable, high nominal value of 90V, the switching MOSFET is turned OFF voltage, dual EL Lamp driver designed for driving two to conserve power. electroluminescent (EL) Lamps with a combined area of 5.0 square inches. The input supply voltage range is from 2.5V EL Lamp dimming can be accomplished by applying a PWM to 4.5V. Enable input logic high can go as low as 1.5V, which logic signal to the PWM pin. The EL Lamp brightness will be allows logic interface operating from typical 1.8V supplies. proportional to the PWM duty cycle. The HV862 can also The device is designed to minimize audible noise emitted by slowly turn the EL Lamp ON/OFF giving a fade ON/OFF the EL Lamps. appearance.
Typical Application Circuit
VIN = 3.2V to 4.2V 4.7F 100H Coilcraft LPS4012 3.3M 15 14 7 8 1N4148 3.3nF 100V NPO 12 11 9 10 EL2 EL1
VREG
VDD = 3.0V 0.1F 3 2.0M 1 REL-osc 2 RSW-osc 825k Input Logic Control: ON = 1.5V to VDD OFF = 0V to 0.2V 4 5
VOUT
LX
CS EL1 COM1 EL2
VDD
EN1 EN2 VREF
16
COM2 PWM
13
GND
6
2.2F
HV862K7-G
HV862
Ordering Information
Package Option Device HV862 16-Lead QFN
(3x3mm body, 0.80mm height (max), 0.50mm pitch)
Pin Configuration
VREF VREG VOUT PWM
16
REL-osc RSW-osc VDD EN1
15
14
13 12 11 10 9
EL1 COM1 COM2 EL2
HV862K7-G
1 2 3 4 5 6 7
LX
-G indicates package is RoHS compliant (`Green')
8
CS
Absolute Maximum Ratings
Parameter VDD, Supply Voltage Operating Temperature Storage Temperature Power Dissipation VCS, Output Voltage Value -0.5V to 5.5V -40C to +85C -65C to +150C 1.6W -0.5V to +120V
H862 YWLL
EN2 GND
16-Lead QFN
(top view)
Note: Pads are at the bottom of the package. Center heat slug is at ground potential.
Product Marking
Y = Last Digit of Year Molded W = Code for Week Molded L = Lot Number = "Green" Packaging
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
16-Lead QFN Package
Thermal Resistance
Package 16-Lead QFN ja 60 C/W
Electrical Characteristics
(Over recommended operating conditions unless otherwise specified)
Sym RDS(ON) VCS VCS VREG VREFH IREF(SOURCE) IREF(SINK)
Parameter On-resistance of switching transistor Maximum output regulation voltage Output regulation voltage External input voltage range VREF output high voltage Average sourcing current from VREF pin Average sinking current from VREF pin
Min 80 0 1.12 -
Typ 90 78 62 45 1.26 6.0 6.0 -
Max 7.0 100 1.40 1.40 300 400 500
Units V V V V A A
Conditions I = 100mA VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V, VREG = 1.092V VDD = 2.5V to 4.5V, VREG = 0.862V VDD = 2.5V to 4.5V, VREG = 0.632V VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V VDD = 2.5V, EN1 = EN2 = PWM = LOW VDD = 3.0V, EN1 = EN2 = PWM = LOW VDD = 4.5V, EN1 = EN2 = PWM = LOW
IDDQ
Quiescent VDD supply current
-
nA
2
HV862
Electrical Characteristics (cont.)
Symbol IDD IIN fEL fSW PWM D VIH VIL IIH IIL CIN Parameter Input current going into the VDD pin Input current including inductor current EL Lamp frequency Switching transistor frequency Input PWM frequency Switching transistor duty cycle Enable PWM input logic high voltage Enable PWM input logic low voltage Enable PWM input logic high current Enable PWM input logic low current Enable PWM input capacitance Min 160 84 10 1.5 0 Typ 25 190 100 88 Max 250 50 220 116 100 VDD 0.2 1.0 -1.0 15 Units A mA Hz kHz kHz % V V A A pF Conditions VDD = 2.5V to 4.5V, REL = 2.0M, RSW = 825k VIN = 3.2V (see Test Circuit) REL = 2.0M RSW = 825k ----VDD = 2.5V to 4.5V VDD = 2.5V to 4.5V VIH = VDD = 2.5V to 4.5V VIL = 0V, VDD = 2.5V to 4.5V ---
Recommended Operating Conditions
Symbol VDD fSW fEL CLOAD TA Parameter Supply voltage Switching frequency EL output frequency Total EL Lamp capacitance load Operating Temperature Min 2.5 40 100 0 -40 Typ Max 4.5 200 500 20 +85 Units V kHz Hz nF C Conditions -----------
Function Table
EN1 0 0 1 1 EN2 0 1 0 1 EL1 Hi Z Hi Z ON ON EL2 Hi Z ON Hi Z ON COM1 Hi Z Hi Z ON ON COM2 Hi Z ON Hi Z ON IC OFF ON ON ON
Typical Performance
VDD
(V)
VIN
(V)
Lamp EL1 ON
IIN
(mA)
VCS
(VPEAK)
FEL
(Hz)
Lamp Brightness
(cd/m2)
EL1 14.8
EL2 18.0 17.7
16.9 11.4 25.0 93 188
3.0
4.0
EL2 ON EL1 and EL2 ON
14.6
3
HV862
Pin Configuration and External Component Description
Pin # Name Description External resistor from REL-Osc to VDD sets the EL frequency. The EL frequency is inversely proportional to the external REL resistor value. Reducing the resistor value by a factor of two will result in increasing the EL frequency by two. fEL = (2.0M * 190Hz) / REL External resistor from RSW-Osc to VDD sets the switch converter frequency. The switch converter frequency is inversely proportional to the external RSW resistor value. Reducing the resistor value by a factor of two will result in increasing the switch converter frequency by two. fSW = (825k * 100kHz) / RSW Low voltage input supply pin. Enable input signal for EL Lamp 1. CMOS logic input pin. Refer to the function table. Enable input signal for EL Lamp 2. CMOS logic input pin. Refer to the function table. Device ground. Drain of internal switching MOSFET. Connection for an external inductor. The inductor LX is used to boost the low input voltage by inductive flyback. When the internal switch is on, the inductor is being charged. When the internal switch is off, the charge stored in the inductor will be transferred to the high voltage capacitor CS. The energy stored in the capacitor is connected to the internal H-bridge, and therefore to the EL Lamp. In general, smaller value inductors, which can handle more current, are more suitable to drive larger size Lamps. As the inductor value decreases, the switching frequency of the inductor (controlled by RSW) should be increased to avoid saturation. Connect a 100V capacitor between this pin and ground. This capacitor stores the energy transferred from the inductor. EL Lamp 2 connection. Common connection for EL2 Lamp. Common connection for EL1 Lamp. EL Lamp 1 connection. PWM pulse input for EL Lamp dimming. The duty cycle of the PWM signal is proportional to the output voltage. If PWM dimming is not desired, then the PWM pin should be tied to ground. Switched internal reference voltage. Input voltage to set VCS regulation voltage. This pin allows an external voltage source to control the VCS amplitude. EL Lamp dimming can be accomplished by varying the input voltage to VREG. The VCS voltage is approximately 71 times the voltage seen on VREG. External resistor connected between VREG and VOUT pins controls the VCS charging rate. The charging rate is inversely proportional to the resistor value. Internal reference voltage to set the regulation voltage. Connect an external capacitor (CREF) from VREF to ground to slowly brighten the Lamp during power-up and dim down the Lamp during powerdown. The size of the capacitor determines the time taken to brighten up or dim down. If fade-in and fade-out are not required, this pin should be left floating. Fade in/Fade out time = CREF * 210e3.
1
REL-Osc
2
RSW-Osc
3 4 5 6
VDD EN1 EN2 GND
7
LX
8 9 10 11 12 13 14
CS EL2 COM2 COM1 EL1 PWM VOUT
15
VREG
16
VREF
4
HV862
Figure 1: Block Diagram
VDD LX CS
EN1
EL1 Enable EL1
EN2 RSW-osc
EL2 Enable
PWM Switch Oscillator 0 to 88% + VSENSE 1.26V VREF Output Drivers
VCS
COM1
C
VREG
VCS
60pF VOUT GND REL-osc
EL2
VCS
COM2
2 x EL Freq. 1 x EL Freq.
PWM
VREF
Figure 2: Test Circuit
IIN VIN 4.7F 100H Coilcraft LPS4012 3.3M 15 IDD VDD 0.1F 825k Input Logic Control: ON = 1.5V to VDD OFF = 0V to 0.2V 14 7 8 3.3nF 100V NPO 12 620 11 9 620 10 12nF 12nF
1N4148
VREG
3 2.0M 1 2 4 5
VOUT
LX
CS EL1 COM1 EL2
VDD REL-osc RSW-osc EN1 EN2 VREF
16
COM2 PWM
13
GND
6
2.2F
HV862K7-G
5
HV862
Figure 3: Typical Waveform EL1, COM1 and Differential Waveform EL1 - COM1
Split Supply Configuration
The HV862 can also be used for handheld devices operating from a battery where a regulated voltage is available. This is shown in Figure 4. The regulated voltage can be used to run the internal logic of the HV862. The amount of current necessary to run the internal logic is 250A max. Therefore, the regulated voltage could easily provide the current without being loaded down.
Enable/Disable Configuration
EL1 and EL2 outputs can be enabled and disabled via a logic control signal on the EN1 and EN2 pins respectively. When EN1 is high/low, the Lamp1 (EL1) will be ON/OFF. When EN2 is high/low, the Lamp2 (EL2) will be ON/OFF. The control signal can be from a microprocessor.
Figure 4: Split Supply and Enable/Disable Configuration
Battery Voltage = VIN + _ CIN LX RREG 15 14 7 8 CS 12 11 9 10 EL2 EL1 D
VREG
3 Regulated Voltage = VDD + _ CDD REL
VOUT
LX
CS EL1 COM1 EL2
VDD
1R EL-osc 2 RSW-osc
RSW Input Logic Control: Input Logic Control:
4 5
EN1 EN2 VREF
16
COM2 PWM
13
GND
6
CREF
HV862K7-G
6
HV862
16-Lead QFN Package Outline (K7)
(3x3mm body, 0.80mm height (max), 0.50mm pitch)
16 D D2 16 Note 1 (Index Area D/2 x E/2)
1 Note 1 (Index Area D/2 x E/2) E e
1
E2
b
View B
Top View
Bottom View
Note 3 L
A A3 A1
Seating Plane L1 Note 2
Side View
View B
Notes: 1. Details of Pin 1 identifier are optional, but must be located within the indicated area. The Pin 1 identifier may be either a mold, or an embedded metal or marked feature. 2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present. 3. The inner tip of the lead may be either rounded or square.
Symbol MIN Dimension (mm) NOM MAX
A 0.70 0.75 0.80
A1 0.00 0.02 0.05
A3 0.20 REF
b 0.18 0.25 0.30
D 2.85 3.00 3.15
D2 1.50 1.65 1.80
E 2.85 3.00 3.15
E2 1.50 1.65 1.80
e 0.50 BSC
L 0.20* 0.30* 0.45
L1 0.00 0.15
0O 14O
JEDEC Registration MO-220, Variation WEED-4, Issue K, June 2006. Dimensions marked with (*) are non-JEDEC dimensions. Drawings are not to scale.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-HV862 A091107 7

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